1. Field of the Invention
The present invention relates to a tungsten layer formation method for a semiconductor device, and more particularly, to a tungsten layer formation method for a semiconductor device that reduces the resistivity of the tungsten layer and a semiconductor device using the same.
2. Description of the Related Art
Generally, a semiconductor device is manufactured by sequentially forming multiple layers, such as a polycrystalline layer, an oxide layer, an insulating layer and a metal layer, etc. on a semiconductor substrate (e.g., a wafer), and forming patterns thereon according to the characteristics of the semiconductor device through conventional photolithography, etching and ion-implantation processes.
As the design rule for highly-integrated semiconductor devices continues to decrease, the aspect ratio of contact holes within such devices continues to increase. As a result of the increased aspect ratio, an aluminum layer can not be easily buried inside the contact holes using conventional sputtering methods. Recently, a CVD (Chemical Vapor Deposition) method has been introduced for depositing metal by way of a chemical reaction after vaporizing certain metal chemicals. A widely used method is a tungsten (W) CVD method which exhibits good contact hole burial characteristics.
The conventional CVD tungsten layer formation method is described with reference to FIG. 1. First, an insulating layer 11 such as an oxide layer or the like is formed on the semiconductor substrate 10. Thereafter, a portion of the insulating layer 11 is removed, by patterning and etching for example, so as to form contact holes 12.
A barrier metal layer 16 is then formed on the insulating layer 11, with the barrier metal layer 16 comprising a titanium (Ti) layer 13 and a titanium nitride (TiN) layer 15, each having a thickness of about 700 xc3x85, which are sequentially formed. The surface of the barrier metal layer 16 is treated using SiH4 gas under a pressure environment of between 4.5 to 40 Torr.
Then, a tungsten seed layer (not shown) is formed on the barrier metal layer 16 using WF6 and SiH4 gas with the mixing ratio of the gases {WF6}: {SiH4} being about 1:1 to 3:1, under the same pressure environment as above, that is, 4.5 to 40 Torr. Thereafter, a tungsten layer 18 of about 4400 xc3x85 in thickness is formed on the treated barrier metal layer 16 using WF6 and H2.
Although the tungsten layer 18 formed as described above is easily buried inside the contact hole, the resistivity (xcfx81: xcexcxcexa9xc2x7cm) is four to five times as high as the aluminum layer used for conventional metal pattern lines. As a result, the operational speed of the semiconductor device is decreased and the power consumption is increased when using the tungsten metal pattern lines.
When the tungsten layer 18 having a polycrystalline structure is formed as described above, the average grain size of the tungsten layer 18 is about 2000 to 2500 xc3x85 and the area encompassed within the grain boundary is increased,thereby increasing the resistivity because of the increase in electrical resistance within the boundary.
In an attempt to overcome this problem, some have added diborane (B2H6) gas to reduce the resistivity of the tungsten layer during the formation of the tungsten layer. By adding diborane (B2H6) gas during the tungsten layer formation, the grain size of the tungsten layer having a polycrystalline structure is increased to thereby reduce the resistance. As a result, the resistivity of the tungsten layer may be reduced from about 11.4-11.7 xcexcxcexa9xc2x7cm down to about 8-9 xcexcxcexa9xc2x7cm.
However, there are drawbacks to using this technique, for example, the requirement for installing a separate diborane gas line and mass flow controller. In addition, there is a decrease in the burial characteristics of the tungsten layer and the process window.
Others in the art have formed metal pattern line structures wherein a tungsten plug is formed inside the contact hole, and an aluminum layer is formed thereon. In this manner, the defects experienced with the burial characteristics of the aluminum layer, and the problems with the high resistivity of the tungsten layer have been minimized.
Again there are drawbacks to using this technique because during the formation of the metal pattern lines comprising a tungsten plug and an aluminum layer, a planarization process such as CMP (Chemical Mechanical Polishing) or Etch Back should be additionally carried out after forming the tungsten layer for the tungsten plug. The planarization process increases both the processing time and costs for manufacturing semiconductor devices. Further, there is a possibility of additional process failures occurring during the planarization process.
The present invention is directed to providing a tungsten layer formation method for a semiconductor device that reduces the resistivity of the tungsten layer without the need to alter the conventional manufacturing system.
To achieve this and other advantages and in accordance with the purposes of the present invention, the tungsten layer formation method for semiconductor devices includes treating the surface of a barrier metal layer formed over a semiconductor substrate in a pressure environment of over 40 Torr using SiH4 gas. A tungsten seed layer is then formed on the treated barrier metal layer using WF6 and SiH4 gases, with the mixing ratio {WF6}/{SiH4} of the gases being less than or equal to 1. A tungsten layer is thereafter formed on the treated barrier metal layer having the tungsten seed layer formed thereon. The tungsten layer is formed by supplying WF6 gas or a mixed gas of WF6 and H2 gas. The barrier metal layer comprises a titanium (Ti) layer and a titanium nitride (TiN) layer, which are sequentially formed.
Preferably, the treating is carried out in a pressure environment of over 90 Torr. Also, the tungsten seed layer is formed in a pressure environment that is less than atmospheric pressure, and preferably, the tungsten seed layer is formed in a pressure environment of between 4 and 5 Torr.
In another aspect of the present invention, a tungsten layer formation method for semiconductor devices includes forming an insulating layer over a semiconductor substrate; forming contact holes in the insulating layer; forming a barrier metal layer along the inner wall of the contact holes; treating the surface of the barrier metal layer using SiH4 gas in a pressure environment of over 40 Torr; forming a tungsten seed layer on the surface of the treated barrier metal layer using WF6 and SiH4 gases in which the ratio {WF6}/{SiH4} of the gases is less than or equal to 1; and forming a tungsten layer over the treated barrier metal layer having the tungsten seed layer using WF6 gas mixed with H2 gas. The barrier metal layer comprises a titanium (Ti) layer and a titanium nitride (TiN) layer, which are sequentially formed.
Preferably, the treating is carried out in a pressure environment of over 90 Torr. Also, the tungsten seed layer is formed in a pressure environment that is less than atmospheric pressure, and preferably, the tungsten seed layer is formed in a pressure environment of between 4 and 5 Torr.
In another aspect of the present invention, a semiconductor device includes an insulating layer over a semiconductor substrate, a contact hole formed inside the insulating layer, a barrier metal layer formed along the inner wall of the contact hole, and a tungsten layer formed on the barrier metal layer, the tungsten layer being formed by treating the surface of the barrier metal layer using SiH4 in a pressure environment of over 40 Torr, forming a tungsten seed layer on the treated surface of the barrier metal layer using WF6 and SiH4 gases, in which the ratio {WF6}/{SiH4} of the gases is less than or equal to 1, and forming a tungsten layer over the treated barrier metal layer having the tungsten seed layer using WF6 gas mixed with H2 gas.
The average grain size of the tungsten layer is between 3500 and 4000 xc3x85 and the thickness of the tungsten layer is between 4000 and 5000 xc3x85. The resulting resistivity of the tungsten layer is between 9.9 and 10.1 xcexcxcexa9xc2x7cm.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.